The present invention relates to a performance control apparatus and more particularly to a performance control apparatus that can modify performance in accordance with the rate of operation of an instruction processor.
In the construction of a computer system, the processing power or the maximum processing speed of a computer is determined to match an expected maximum amount of operation. On the other hand, in operation, the rate of operation is monitored to examine the sufficiency of the processing power and the data monitored and the like are collected to be stored as operation history. The stored data can be analyzed to thereby extremely eliminate impediment to operation due to lack of the processing power.
As described above, in the conventional computer system, the processing power of the computer is selected to match the expected maximum amount of operation. Accordingly, the charge paid by the user for use of the computer is not set to an actual amount of operation but is set to the maximum amount of operation, so that there is a problem from the viewpoint of service to the user.
Further, when the amount of operation is increased rapidly and exceeds the maximum amount of operation, the processing of operation is sometimes inversely affected.
Furthermore, when monitoring and modification of the processing power of a processing unit (CPU) in the operation are made manually, immediate processing to cope with the rapidly increased amount of operation cannot be attained, so that the operation is adversely affected and the cost is raised.
It is an object of the present invention to provide a performance control apparatus that can modify performance of an operation control unit in accordance with the rate of operation to exhibit the performance conformable to variation in an amount of operation.
According to the present invention, in order to solve the above problems, the following measures are adopted.
The performance control apparatus according to the present invention comprises an operation processing unit that can control performance represented by the number of instructions executed per unit time by means of hardware, a monitoring unit that measures the performance, a control unit that controls to modify the performance of the operation processing unit, a control information memory unit that stores control information which is a reference or standard for modifying the performance, and a history information memory unit that stores history information of the performance measured by the monitoring unit, whereby the control unit controls to modify the performance on the basis of the control information and the history information.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.